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__________________ general description the +5v max5250 combines four low-power, voltage- output, 10-bit digital-to-analog converters (dacs) and four precision output amplifiers in a space-saving, 20- pin package. in addition to the four voltage outputs, each amplifier? negative input is also available to the user. this facilitates specific gain configurations, remote sensing, and high output drive capacity, making the max5250 ideal for industrial-process-control applica- tions. other features include software shutdown, hard- ware shutdown lockout, an active-low reset that clears all registers and dacs to zero, a user-programmable logic output, and a serial-data output. each dac has a double-buffered input organized as an input register followed by a dac register. a 16-bit serial word loads data into each input/dac register. the 3-wire serial interface is compatible with spi/qspi and microwire. it allows the input and dac regis- ters to be updated independently or simultaneously with a single software command. all logic inputs are ttl/cmos-logic compatible. ________________________applications digital offset and gain adjustment microprocessor-controlled systems industrial process controls automatic test equipment remote industrial controls motion control ______________________________ features four 10-bit dacs with configurable output amplifiers +5v single-supply operation low supply current: 0.85ma normal operation 10a shutdown mode available in 20-pin ssop and dip packages power-on reset clears all registers and dacs to zero spi/qspi and microwire compatible simultaneous or independent control of dacs through 3-wire serial interface user-programmable digital output schmitt-trigger inputs for direct optocoupler interface 12-bit upgrade available: max525 max5250 low-power, quad, 10-bit voltage-output dac with serial interface ________________________________________________________________ maxim integrated products 1 max5250 outa fba fbb fbc fbd dac a dac b dac c dac d refab dac register a decode control input register a dac register b input register b dac register c input register c dac register d input register d 16-bit shift register sr control logic output cs din sclk outb outc outd dout pdl cl v dd agnd dgnd upo refcd _________________________________________________________________________ functional diagram 19-1171; rev 1; 10/02 _________________or dering information ordering information continued on last page. pin configuration appears at end of data sheet. for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. part max5250acpp max5250bcpp max5250acap 0? to +70? 0? to +70? 0? to +70? temp range pin-package 20 plastic dip 20 plastic dip 20 ssop inl (lsb) ?/2 ? ?/2 max5250bcap 0? to +70? 20 ssop ?
max5250 low-power, quad, 10-bit voltage-output dac with serial interface 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dd = +5v ?0%, agnd = dgnd = 0v, refab = refcd = 2.5v, r l = 5k ? , c l = 100pf, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?. output buffer connected in unity-gain configuration (figure 9).) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to agnd............................................................-0.3v to +6v v dd to dgnd ...........................................................-0.3v to +6v agnd to dgnd ..................................................................?.3v refab, refcd to agnd ...........................-0.3v to (v dd + 0.3v) out_, fb_ to agnd...................................-0.3v to (v dd + 0.3v) digital inputs to dgnd.............................................-0.3v to +6v dout, upo to dgnd ................................-0.3v to (v dd + 0.3v) continuous current into any pin.......................................?0ma continuous power dissipation (t a = +70?) plastic dip (derate 8.00mw/? above +70?) .................640mw ssop (derate 8.00mw/? above +70?) ......................640mw cerdip (derate 11.11mw/? above +70?) .................889mw operating temperature ranges max5250_c_p ......................................................0? to +70? max5250_e_p ...................................................-40? to +85? max5250bmjp ................................................-55? to +125? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol min typ max units offset-error tempco 6 ppm/? offset error v os ?.0 mv differential nonlinearity dnl ?.0 lsb integral nonlinearity (note 1) inl ?.0 lsb gain error ge ?.0 lsb gain-error tempco 1 ppm/? power-supply rejection ratio psrr 100 800 ?/v resolution n 10 bits ?.25 ?.5 reference input range v ref 0v dd - 1.4 v reference input resistance r ref 8 k ? reference -3db bandwidth 650 khz signal-to-noise plus distortion ratio sinad 72 db v ref = 0.67v p-p v ref = 1v p-p at 25khz, code = full scale reference feedthrough -84 db input code = all 0s, v ref = 3.6v p-p at 1khz conditions code dependent, minimum at code 554 hex guaranteed monotonic max5250b (note 1) 4.5v v dd 5.5v max5250a static performance?nalog section reference input multiplying-mode performance
max5250 low-power, quad, 10-bit voltage-output dac with serial interface _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +5v ?0%, agnd = dgnd = 0v, refab = refcd = 2.5v, r l = 5k ? , c l = 100pf, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?. output buffer connected in unity-gain configuration (figure 9).) note 1: guaranteed from code 3 to code 1023 in unity-gain configuration. note 2: accuracy is better than 1lsb for v out = 6mv to v dd - 60mv, guaranteed by a power-supply rejection test at the end points. note 3: r l = , digital inputs at dgnd or v dd . parameter symbol min typ max units output high voltage v oh v dd - 0.5 v input capacitance c in 8 pf input leakage current i in 0.01 ?.0 ? reference current in shutdown 0.01 ? ? output low voltage v ol 0.13 0.4 v voltage output slew rate sr 0.6 v/? input high voltage v ih 2.4 v input low voltage v il 0.8 v output settling time 10 ? output voltage swing 0 to v dd v current into fb_ 0 0.1 ? out_ leakage current in shutdown 0.01 ? ? start-up time exiting shutdown mode 15 ? digital feedthrough 5 nv-s digital crosstalk 5 nv-s supply voltage v dd 4.5 5.5 v supply current i dd 0.85 0.98 ma supply current in shutdown 10 20 ? conditions to ?/2lsb, v step = 2.5v i source = 2ma rail-to-rail (note 2) v in = 0v or v dd i sink = 2ma r l = cs = v dd , din = 100khz (note 3) (note 3) digital inputs digital outputs dynamic performance power supplies rail-to-rail is a registered trademark of nippon motorola, inc.
1000 950 900 850 800 750 700 650 600 550 500 -55 -40 -20 0 20 40 60 80 100 120 max5250-03 supply current ( a) supply current vs. temperature temperature ( c) code = ffc hex inl (lsb) -0.125 0.4 1.2 2.0 2.8 3.6 reference voltage (v) max5250-01 4.4 0.075 0.050 0.025 0 -0.025 -0.050 -0.075 -0.100 r l = 5k ? integral nonlinearity vs. reference voltage 0 -4 -8 -12 -16 -20 0 500k 1.0m 1.5m 2.0m 2.5m 3.0m max5250-02 relative output (db) reference voltage input frequency response frequency (hz) refab swept 0.67v p-p r l = 5k ? c l = 100pf __________________________________________typical operating characteristics (v dd = +5v, t a = +25?, unless otherwise noted.) max5250 low-power, quad, 10-bit voltage-output dac with serial interface 4 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = +5v ?0%, agnd = dgnd = 0v, refab = refcd = 2.5v, r l = 5k ? , c l = 100pf, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?. output buffer connected in unity-gain configuration (figure 9).) ns 0 t csh sclk raise to cs rise hold time c load = 200pf c load = 200pf conditions ns 100 t csw cs pulse width high ns 40 t cs1 cs rise to sclk rise hold time ns 40 t cs0 sclk rise to cs fall delay ns 80 t d02 sclk fall to dout valid propagation delay ns 80 t d01 sclk rise to dout valid propagation delay ns 0 t dh din hold time ns 40 t ds din setup time ns 40 t css cs fall to sclk rise setup time ns 40 t cl sclk pulse width low ns 40 t ch sclk pulse width high ns 100 t cp sclk clock period units min typ max symbol parameter timing characteristics (figure 6)
max5250 low-power, quad, 10-bit voltage-output dac with serial interface _______________________________________________________________________________________ 5 0.50 0 1 100 total harmonic distortion plus noise vs. frequency 0.05 max5250-05 frequency (khz) thd + noise (%) 0.15 0.25 0.35 10 0.45 0.10 0.20 0.30 0.40 dac code = full scale refab = 1v p-p r l = 5k ? c l = 100pf -100 0.5 1.6 3.8 output fft plot -60 0 max5250-10 frequency (khz) signal amplitude (db) 2.7 4.9 6.0 -20 -40 -80 v ref = 1khz, 0.006v to 3.6v r l = 5k ? c l = 100pf ____________________________typical operating characteristics (continued) (v dd = +5v, t a = +25?, unless otherwise noted.) 4.0 4.2 4.6 4.4 4.8 5.0 5.2 5.4 5.6 supply current vs. supply voltage max5250-04 supply voltage (v) supply current ( a) 1000 950 900 850 800 750 700 650 600 code = ffc hex 0 -1.25 0.01 0.1 1 10 100 full-scale error vs. load -1.00 max5250-09 load (k ? ) full-scale error (lsb) -0.75 -0.50 -0.25 -100 0.5 1.2 2.6 reference feedthrough at 1khz -60 0 max5250-11 frequency (khz) signal amplitude (db) 1.9 3.3 4.0 -20 -40 -80 outa feedthrough refab input signal v ref = 3.6v p-p at 1khz r l = 5k ? c l = 100pf
10 s/div major-carry transition max5250-07 outb, ac-coupled 100mv/div cs 5v/div 2 s/div outa, ac-coupled 10mv/div digital feedthrough (sclk = 100khz) max5250-08 sclk, 2v/div cs = pdl = c l = 5v, din = 0v dac a code set to 800 hex dac a code switching from 00c hex to ffc hex dac b code set to 800 hex 10 s/div gnd outb, ac-coupled 10mv/div analog crosstalk max5250-12 outa, 1v/div switching from code 000 hex to fb4 hex output amplifier gain = +2 10 s/div dynamic response max5250-13 outa, 1v/div max5250 low-power, quad, 10-bit voltage-output dac with serial interface 6 _______________________________________________________________________________________ ____________________________typical operating characteristics (continued) (v dd = +5v, v ref = 2.5v, r l = 5k ? , c l = 100pf, t a = +25?, unless otherwise noted.)
max5250 low-power, quad, 10-bit voltage-output dac with serial interface _______________________________________________________________________________________ 7 ______________________________________________________________pin description pin name function 1 agnd analog ground 2 fba dac a output amplifier feedback 3 outa dac a output voltage 4 outb dac b output voltage 5 fbb dac b output amplifier feedback 6 refab reference voltage input for dac a and dac b 7 cl clear all dacs and registers. resets all outputs (out_, upo, dout) to 0, active low. 8 cs chip-select input. active low. 9 din serial-data input 10 sclk serial-clock input 11 dgnd digital ground 12 dout serial-data output 13 upo user-programmable logic output 14 pdl power-down lockout. active low. locks out software shutdown if low. 15 refcd reference voltage input for dac c and dac d 16 fbc dac c output amplifier feedback 17 outc dac c output voltage 18 outd dac d output voltage 19 fbd dac d output amplifier feedback 20 v dd positive power supply
max5250 low-power, quad, 10-bit voltage-output dac with serial interface 8 _______________________________________________________________________________________ _______________detailed description the max5250 contains four 10-bit, voltage-output digi- tal-to-analog converters (dacs) that are easily addressed using a simple 3-wire serial interface. it includes a 16-bit data-in/data-out shift register, and each dac has a doubled-buffered input composed of an input register and a dac register (see functional diagram ). in addition to the four voltage outputs, each amplifier? negative input is available to the user. the dacs are inverted r-2r ladder networks that con- vert a digital input (10 data bits plus 2 sub-bits) into equivalent analog output voltages in proportion to the applied reference voltage inputs. dacs a and b share the refab reference input, while dacs c and d share the refcd reference input. the two reference inputs allow different full-scale output voltage ranges for each pair of dacs. figure 1 shows a simplified circuit dia- gram of one of the four dacs. reference inputs the two reference inputs accept positive dc and ac signals. the voltage at each reference input sets the full-scale output voltage for its two corresponding dacs. the reference input voltage range is 0v to (v dd - 1.4v). the output voltages (v out_) are repre- sented by a digitally programmable voltage source as: v out_ = (v ref x nb / 1024) x gain where nb is the numeric value of the dac? binary input code (0 to 1023), v ref is the reference voltage, and gain is the externally set voltage gain. the impedance at each reference input is code depen- dent, ranging from a low value of 10k ? when both dacs connected to the reference have an input code of 554 hex, to a high value exceeding several giga ohms (leakage currents) with an input code of 000 hex. because the input impedance at the reference pins is code dependent, load regulation of the reference source is important. the refab and refcd reference inputs have a 10k ? guaranteed minimum input impedance. when the two reference inputs are driven from the same source, the effective minimum impedance is 5k ? . a voltage refer- ence with a load regulation of 6ppm/ma, such as the max873, would typically deviate by 0.006lsb (0.015lsb worst case) when driving both max5250 reference inputs simultaneously at 2.5v. driving the refab and refcd pins separately improves reference accuracy. in shutdown mode, the max5250? refab and refcd inputs enter a high-impedance state with a typical input leakage current of 0.01?. the reference input capacitance is also code depen- dent and typically ranges from 20pf with an input code of all 0s to 100pf at full scale. output amplifiers all max5250 dac outputs are internally buffered by pre- cision amplifiers with a typical slew rate of 0.6v/?. access to each output amplifier? inverting input provides the user greater flexibility in out put gain setting/ signal conditioning (see the applications information section). with a full-scale transition at the max5250 output, the typical settling time to ?/2lsb is 10? when loaded with 5k ? in parallel with 100pf (loads less than 2k ? degrade performance). the max5250 output amplifier? output dynamic responses and settling performances are shown in the typical operating characteristics . power-down mode the max5250 features a software-programmable shut- down that reduces supply current to a typical value of 10?. the power-down lockout pin ( pdl ) must be high to enable shutdown mode. writing 1100xxxxxxxxxxxx as the input-control word puts the max5250 in power-down mode (table 1). out_ fb_ shown for all 1s on dac s0 s1 d0 d9 2r 2r 2r 2r 2r rrr ref_ agnd figure 1. simplified dac circuit diagram
in power-down mode, the max5250 output amplifiers and the reference inputs enter a high-impedance state. the serial interface remains active. data in the input registers is retained in power-down, allowing the max5250 to recall the output states prior to entering shutdown. start up from power-down either by recalling the previous configuration or by updating the dacs with new data. when powering up the device or bring- ing it out of shutdown, allow 15? for the outputs to stabilize. serial-interface configurations the max5250? 3-wire serial interface is compatible with both microwire (figure 2) and spi/qspi (figure 3). the serial input word consists of two address bits and two control bits followed by 10+2 data bits (msb first), as shown in figure 4. the 4-bit address/ control code determines the max5250? response out- lined in table 1. the connection between dout and the serial-interface port is not necessary, but may be used for data echo. data held in the max5250? shift register can be shifted out of dout and returned to the microprocessor (?) for data verification. the max5250? digital inputs are double buffered. depending on the command issued through the serial interface, the input register(s) can be loaded without affecting the dac register(s), the dac register(s) can be loaded directly, or all four dac registers can be updated simultaneously from the input registers (table 1). serial-interface description the max5250 requires 16 bits of serial data. table 1 lists the serial-interface programming commands. for certain commands, the 10+2 data bits are ?on? cares.?data is sent msb first and can be sent in two 8-bit packets or one 16-bit word ( cs must remain low until 16 bits are transferred). the serial data is com- posed of two dac address bits (a1, a0) and two con- trol bits (c1, c0), followed by the 10+2 data bits d9?0, s1, s0 (figure 4). set both sub-bits (s1, s0) to zero. the 4-bit address/control code determines: ? the register(s) to be updated ? the clock edge on which data is to be clocked out through the serial-data output (dout) ? the state of the user-programmable logic output (upo) ? if the part is to go into shutdown mode (assuming pdl is high) ? how the part is configured when coming out of shut- down mode. max5250 low-power, quad, 10-bit voltage-output dac with serial interface _______________________________________________________________________________________ 9 sclk din dout* cs sk so si* i/o max5250 microwire port *the dout-si connection is not required for writing to the max5250, but can be used for readback purposes. figure 2. connections for microwire dout* din sclk cs miso* mosi sck i/o spi/qspi port ss +5v cpol = 0, cpha = 0 *the dout-miso connection is not required for writing to the max5250, but can be used for readback purposes. max5250 figure 3. connections for spi/qspi figure 4. serial-data format msb ..................................................................................lsb 16 bits of serial data address bits control bits data bits msb ..................................lsb a1 a0 c1 c0 d9 .....................................d0, s1, s0 10+2 data bits 4 address/ control bits
max5250 figure 5 shows the serial-interface timing requirements. the chip-select pin ( cs ) must be low to enable the dac? serial interface. when cs is high, the interface control circuitry is disabled. cs must go low at least t css before the rising serial clock (sclk) edge to prop- erly clock in the first bit. when cs is low, data is clocked into the internal shift register through the serial- data input pin (din) on sclk? rising edge. the maxi- mum guaranteed clock frequency is 10mhz. data is latched into the appropriate max5250 input/dac regis- ters on cs ? rising edge. the programming command load-all-dacs-from-shift- register allows all input and dac registers to be simul- taneously loaded with the same digital code from the input shift register. the no operation (nop) command leaves the register contents unaffected and is useful when the max5250 is configured in a daisy chain (see the daisy chaining devices section). the command to change the clock edge on which serial data is shifted out of dout also loads data from all input registers to their respective dac registers. serial-data output (dout) the serial-data output, dout, is the internal shift regis- ter? output. the max5250 can be programmed so that data is clocked out of dout on sclk? rising edge (mode 1) or falling edge (mode 0). in mode 0, output data at dout lags input data at din by 16.5 clock cycles, maintaining compatibility with microwire, spi/qspi, and other serial interfaces. in mode 1, output data lags input data by 16 clock cycles. on power-up, dout defaults to mode 0 timing. user-programmable logic output (upo) the user-programmable logic output, upo, allows an external device to be controlled through the max5250 serial interface (table 1). low-power, quad, 10-bit voltage-output dac with serial interface 10 ______________________________________________________________________________________ table 1. serial-interface programming commands ??= don? care 16-bit serial word function a1 a0 c1 c0 d9.................d0 msb.............lsb s1 s0 00 01 10 11 01 01 01 01 10-bit dac data 10-bit dac data 10-bit dac data 10-bit dac data 00 00 00 00 load input register a; dac registers unchanged. load input register b; dac registers unchanged. load input register c; dac registers unchanged. load input register d; dac registers unchanged. 00 01 10 11 11 11 11 11 10-bit dac data 10-bit dac data 10-bit dac data 10-bit dac data 00 00 00 00 load input register a; all dac registers updated. load input register b; all dac registers updated. load input register c; all dac registers updated. load input register d; all dac registers updated. 01 00 xxxxxxxxxx xx update all dac registers from their respective input registers (also exit shutdown mode). 10 00 10-bit dac data 00 load all dac registers from shift register (also exit shutdown mode). 11 00 xxxxxxxxxx xx enter shutdown mode (provided pdl = 1). 00 10 xxxxxxxxxx xx upo goes low (default). 01 10 xxxxxxxxxx xx upo goes high. 00 00 xxxxxxxxxx xx no operation (nop) to dac registers 11 10 xxxxxxxxxx xx mode 1, dout clocked out on sclk? rising edge. all dac registers updated. 10 10 xxxxxxxxxx xx mode 0, dout clocked out on sclk? falling edge. all dac registers updated (default).
power-down (pdl) the power-down lockout pin pdl disables software shutdown when low. when in shutdown, transitioning pdl from high to low wakes up the part with the output set to the state prior to shutdown. pdl can also be used to wake up the device asynchronously. daisy chaining devices any number of max5250s can be daisy chained by connecting the dout pin of one device to the din pin of the following device in the chain (figure 7). since the max5250? dout pin has an internal active pull-up, the dout sink/source capability determines the time required to discharge/charge a capacitive load. refer to the serial-data-out v oh and v ol specifi- cations in the electrical characteristics. figure 8 shows an alternate method of connecting sev- eral max5250s. in this configuration, the data bus is common to all devices; data is not shifted through a daisy chain. more i/o lines are required in this configu- ration because a dedicated chip-select input ( cs ) is required for each ic. max5250 low-power, quad, 10-bit voltage-output dac with serial interface ______________________________________________________________________________________ 11 cs sclk din dout (mode 1) msb from previous write msb from previous write command executed 9 8 16 1 a0 a1 s0 c1 c0 d9 d8 d7 d4 d3 d2 d1 d0 s1 d6 d5 dout (mode 0) a0 a1 s0 a1 c1 c0 d9 d8 d7 d4 d3 d2 d1 d0 s1 d6 d5 a0 a1 s0 a1 c1 c0 d9 d8 d7 d4 d3 d2 d1 d0 s1 d6 d5 data packet (n) data packet (n-1) data packet (n) data packet (n-1) data packet (n) figure 5. serial-interface timing diagram sclk din dout t cso t css t cl t ch t cp t do1 t csw t cs1 t do2 t csh t ds t dh cs figure 6. detailed serial-interface timing diagram
max5250 low-power, quad, 10-bit voltage-output dac with serial interface 12 ______________________________________________________________________________________ din cs to other serial devices max5250 sclk din cs dout max5250 sclk din cs dout max5250 sclk din cs dout sclk figure 7. daisy-chaining max5250s to other serial devices max5250 din sclk cs max5250 din sclk cs max5250 din sclk cs din sclk cs1 cs2 cs3 figure 8. multiple max5250s sharing a common din line
__________applications information unipolar output for a unipolar output, the output voltages and the refer- ence inputs have the same polarity. figure 9 shows the max5250 unipolar output circuit, which is also the typi- cal operating circuit. table 2 lists the unipolar output codes. for rail-to-rail outputs, see figure 10. this circuit shows the max5250 with the output amplifiers configured with a closed-loop gain of +2 to provide 0v to 5v full-scale range when a 2.5v reference is used. bipolar output the max5250 outputs can be configured for bipolar operation using figure 11? circuit: v out = v ref [(2nb / 1024) - 1] where nb is the numeric value of the dac? binary input code. table 3 shows digital codes (offset binary) and corresponding output voltages for figure 11? circuit. max5250 low-power, quad, 10-bit voltage-output dac with serial interface ______________________________________________________________________________________ 13 table 2. unipolar code table table 3. bipolar code table ( ) sub-bits dac contents analog output msb lsb 1023 1111 1111 11(00) +v ref ( ? ) 1024 513 1000 0000 01(00) +v ref ( ? ) 1024 512 +v ref 1000 0000 00(00) +v ref ( ? ) = 1024 2 511 0111 1111 11(00) +v ref ( ? ) 1024 1 0000 0000 01(00) +v ref ( ? ) 1024 0000 0000 00(00) 0v dac contents analog output msb lsb 511 1111 1111 11(00) +v ref ( ? ) 512 1 1000 0000 01(00) +v ref ( ? ) 512 1000 0000 00(00) 0v 1 0111 1111 11(00) -v ref ( ? ) 512 511 0000 0000 01(00) -v ref ( ? ) 512 512 0000 0000 00(00) -v ref ( ? ) = -v ref 512 max5250 dac a dac b dac c dac d outa fba fbb fbc fbd outb outc outd dgnd agnd refab refcd reference inputs +5v v dd figure 9. unipolar output circuit
max5250 using an ac reference in applications where the reference has ac signal com- ponents, the max5250 has multiplying capability within the reference input range specifications. figure 12 shows a technique for applying a sine-wave signal to the reference input where the ac signal is offset before being applied to refab/refcd. the reference voltage must never be more negative than dgnd. the max5250? total harmonic distortion plus noise (thd + n) is typically less than -72db (full-scale code), given a 1v p-p signal swing and input frequencies up to 25khz. the typical -3db frequency is 650khz, as shown in the typical operating characteristics graphs. digitally programmable current source the circuit of figure 13 places an npn transistor (2n3904 or similar) within the op-amp feedback loop to implement a digitally programmable, unidirectional cur- rent source. this circuit can be used to drive 4?0ma current loops, which are commonly used in industrial- control applications. the output current is calculated with the following equation: i out = (v ref / r) x (nb / 1024) where nb is the numeric value of the dac? binary input code and r is the sense resistor shown in figure 13. low-power, quad, 10-bit voltage-output dac with serial interface 14 ______________________________________________________________________________________ max5250 dac a dac b dac c dac d v refab = v refcd = 2.5v outa 10k ? 10k ? 10k ? 10k ? 10k ? 10k ? 10k ? 10k ? outb outc outd dgnd agnd refab refcd reference inputs +5v v dd fba fbb fbc fbd figure 10. unipolar rail-to-rail output circuit dac v out +5v -5v r1 = r2 = 10k ? 0.1% max5250 ref_ r1 r2 fb_ out_ figure 11. bipolar output circuit dac_ out_ max5250 10k ? 26k ? ref_ v dd agnd dgnd +5v ac reference input 500mv p-p 1/2 max492 figure 12. ac reference input circuit
power-supply considerations on power-up, all input and dac registers are cleared (set to zero code) and dout is in mode 0 (serial data is shifted out of dout on the clock? falling edge). for rated max5250 performance, limit refab/refcd to less than 1.4v below v dd . bypass v dd with a 4.7? capacitor in parallel with a 0.1? capacitor to agnd. use short lead lengths and place the bypass capaci- tors as close to the supply pins as possible. grounding and layout considerations digital or ac transient signals between agnd and dgnd can create noise at the analog outputs. tie agnd and dgnd together at the dac, then tie this point to the highest-quality ground available. good printed circuit board ground layout minimizes crosstalk between dac outputs, reference inputs, and digital inputs. reduce crosstalk by keeping analog lines away from digital lines. wire-wrapped boards are not recommended. max5250 low-power, quad, 10-bit voltage-output dac with serial interface ______________________________________________________________________________________ 15 dac_ max5250 ref_ out_ r i out 2n3904 v l fb_ figure 13. digitally programmable current source __________________pin configuration 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v dd fbd outd outc outb outa fba agnd top view fbc refcd pdl upo cs cl refab fbb 12 11 9 10 dout dgnd sclk din dip/ssop max5250
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. max5250 low-power, quad, 10-bit voltage-output dac with serial interface _ordering information (continued) ___________________chip information * contact factory for availability and processing to mil-std-883. ssop.eps package outline, ssop, 5.3 mm 1 1 21-0056 c rev. document control no. approval proprietary information title: notes: 1. d&e do not include mold flash. 2. mold flash or protrusions not to exceed .15 mm (.006"). 3. controlling dimension: millimeters. 4. meets jedec mo150. 5. leads to be coplanar within 0.10 mm. 7.90 h l 0 0.301 0.025 8 0.311 0.037 0 7.65 0.63 8 0.95 max 5.38 millimeters b c d e e a1 dim a see variations 0.0256 bsc 0.010 0.004 0.205 0.002 0.015 0.008 0.212 0.008 inches min max 0.078 0.65 bsc 0.25 0.09 5.20 0.05 0.38 0.20 0.21 min 1.73 1.99 millimeters 6.07 6.07 10.07 8.07 7.07 inches d d d d d 0.239 0.239 0.397 0.317 0.278 min 0.249 0.249 0.407 0.328 0.289 max min 6.33 6.33 10.33 8.33 7.33 14l 16l 28l 24l 20l max n a d e a1 l c h e n 12 b 0.068 transistor count: 4337 part max5250aepp max5250bepp max5250aeap -40 c to +85 c -40 c to +85 c -40 c to +85 c temp range pin-package 20 plastic dip 20 plastic dip 20 ssop inl (lsb) 1/2 1 1/2 max5250beap -40 c to +85 c 20 ssop 1 max5250bmjp -55 c to +125 c 20 cerdip* 1 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .)

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